Power Control and Reset

In normal operation the system HW is powered from the main battery. An external charger can recharge the battery while also supplying power to RAE-5. The supplied charger is so called performance charger (ACP-12), which can deliver 850mA.

The power management circuitry provides protection against over-voltages, charger failures and pirate chargers etc. that would otherwise cause damage to RAE-5.

Following chapters give an overview about power management issues.

Power Distribution

Figure 4 describes the power distribution of RAE-5.

Power supply components - CCONT, VBB, Vcore, VACC and VMMC regulators - and the audio amplifier are powered with main battery voltage. Main battery voltage is also fed to RF part for RF power amplifier (PA) and to the UI module for backlight and LCD supply.

Separate linear regulator generates the 2.8V VBB power supply. VBB powers most of the system HW portions including MADLinda, SDRAM, DOC and Serial Flash memories, COBBA_GJP's digital supply and the logic parts of the IR transceiver. It also supplies 2.8V to the UI module.

Separate DC/DC regulator generates the 1.8V Vcore voltage. Vcore is used as supply for the MADLinda and XIP memory core voltage and as IO voltage for XIP and DOC memories.

CCONT's V2V output is used as enable for VBB and Vcore regulators.

VSIM regulator of CCONT is used to generate either 3V or 5V supplies for SIM card. This is required so that RAE-5 can support both 3V and 5V SIM cards.

VR6 generates the voltage for COBBA_GJP's analogue part.

CCONT generates the reference voltage VREF for COBBA_GJP and HAGAR. It also generates the 5V supply voltage (V5V) for RF. In RF side there is separate regulator that drops this voltage to 4.7V for DCT4 RF use.

Regulators VR1 to VR5 inside CCONT generate voltages for RF HW. Regulator control signals come from MADLinda.

Separate 3V linear regulator is used to power the MMC card.

Another 3V linear regulator is used to generate accessory power that can be fed through system connector for external accessory.

"0

CD 3

c CD

3.7V

BATTERY

VBATT

jyy\

VPC (HAGAR)

CD 4

Backlight Power

IR LEDs

IR LEDs

Vacc

Power

Vacc

Power

Audio Amp.

VB CCONT

VR 2

VR 3

VR 4

VR 5

VR 6

CCONT

2.8V LINEAR REG.

VB^P"

1.8V DC/DC

VBATT

VCTCXO + buffers

VSYN 2 VRX

VSYN 1

VR 7

VSIM

VCOBBA

VSIM

COBBA Analog

VREF

COBBA

HAGAR bias

Vcore

MADLinda VBB DOC Core SDRAM (SerFlash) IR LOGIC, HALL COBBA DIGIT. INTERFACES

CMT LCD PDA LCD

MADLinda Core

LMM MADLinda I/O

HAGAR RF-IC RX / TX parts PLL

-d RXREF

HAGARRSTX

VCHP

HAGARRSTX

4.7V LINEAR REG.

SYSTEM HW PARTS

Technical Documentation 3. RF+System Module KL8

Power up

When main battery is connected to device, powering on circuitry keeps CCONT PWRONX/WDDISX pin connected to ground throughl├╝kQ resistor as long as CCONT releases the PURX reset signal. This activates the CCONT immediately when battery is connected.

When the CCONT is activated, it switches on internal baseband and core regulators and generates a power up reset signal PURX for MADLinda. External Vcore and VBB regulators are powered up, Vcore slightly before VBB.

After 62ms CCONT releases the PURX reset signal. When the PURX is released, MADLinda releases the system reset (ExtSysResetX), the Flash reset (FLRPX) and internal reset signals and starts the boot program execution. Note that from battery plug in to PURX release it takes about 100ms since there is no power in CCONT.

The GenSDIO pin is connected low with pull-down resistor so that booting starts from MADLinda's internal boot ROM. If booting is successful (and the programming device is not connected) the program execution continues from external program memory.

The CMT power switch (on the cover) is read as a normal keyboard input. It is not connected to CCONT. CMT Power switch only turns the phone functionality on or off (SW implementation).

Power Off

RAE-5 electronics is powered off only if the main battery voltage drops below the power off SW limit. This happens when the main battery discharges or is removed. When battery voltage drops below SW limit, CCONT is powered down by letting CCONT's watch dog to go off.

Early warning of battery removal is generated by the battery removal switch. Switch connects MADLinda's MPUGenIO6 to ground when user presses the locking latch of the battery.

Only phone functionality is "powered off" when the CMT power switch is pressed. If the main battery is removed when the CMT is on, the SIMIF in MADLinda powers down the SIM.

Charging

Charging of main battery can be started in any operating mode. The battery type and capacity are identified by MADLinda by measuring a pull-down resistor connected to BSI contact inside the battery pack. Charging software running in MADLinda's MPU measures the battery voltage, size, current and temperature.

In Standard charger concept (2-wire charger) the power management circuitry controls the charging current delivered from the charger to the main battery. The charging-current switch inside CHAPS is controlled with 1Hz PWM signal, generated by CCONT. Note that Standard charger is not sold with RAE-5, but it is accepted.

In performance charging concept (3-wire charger) a 32Hz PWM signal is fed to the charger (CHRG_CTRL in system connector). This high rate keeps the charging-current switch in CHAPS continuously connected.

3. RF+System Module KL8 Technical Documentation

The PWM pulse width is controlled by the MPU in MADLinda which sends a control value to CCONT through a serial control data bus. The main battery voltage rise is limited to a specified level by turning the switch off. Lower limit (4.8V) in CHAPS is permanently selected because only lithium batteries are supported. Charging current is monitored by measuring the voltage drop across a sensor resistor.

c charge in

CHARGE CONTROL (PWM in 3-wire concept)

CHAPS IC

(CONTROL

SWITCH)

* Wake-Up Charge

* Voltage protect

CHAPS IC

(CONTROL

SWITCH)

* Wake-Up Charge

* Voltage protect

BATTERY SENSING:

* Voltage

* Size/type

* Temperature

CHARGE CONTROL (PWM in 2-wire concept)

CHARGER SENSING

CCONT IC

* A/D conversion

* PWM output

* Serial data in/out

CHARGER AND BATTERY INTERRUPT

SERIAL DATA

BATTERY SENSING:

* Voltage

* Size/type

* Temperature

* Connect/disconnect detection

* Connect/disconnect detection

SERIAL DATA

ASIC

MPU

MADLinda IC

DSP

Figure 5. Block diagram of charge control in RAE-5

Resets and Watchdogs

Power-up reset signal, PURX, is the main reset in RAE-5. PURX is generated by CCONT during power-on. The watchdog within CCONT is enabled and must be fed periodically to keep CCONT (and whole device) powered on. PURX -signal is connected to MADLinda's reset input (PURX). Figure 6 shows the board/module level reset scheme in RAE-5.

Technical Documentation

3. RF+System Module KL8

Figure 6. Board/Module level reset scheme

PURX resets the whole MADLinda. ExtSysResetX signal follows PURX activity during reset. After reset this signal can be configured as IO and thus controlled by SW with MPUGenOut8 control bit.

The LCD driver reset signal (LCDRSTX) is a MADLinda general purpose output controlled by MPU SW.

Flash memory interface in Traffic Controller's MEMIF block includes Flash reset/power down signal (FLRPX). FLRPX signal follows PURX activity during reset. After reset this signal can be controlled by MPU SW. Signal is connected to XIP Flashes.

MADLinda's SIM interface block generates the reset signal (SimCardRstX) for the SIM. This signal is fed through CCONT, which makes any level shifting necessary according to the voltage level of the SIM card in use.

COBBA_GJP reset signal (COBBARSTX) is DSPGenOutO general purpose output controlled by DSP SW. Reset state of the pin is LOW.

HAGAR reset signal (HAGARRSTX) is DSPGenOutl general purpose output controlled by DSP SW. Reset state of the pin is LOW.

3. RF+System Module KL8 Technical Documentation

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