Memories block

Main components in the block are:

- two 4Mx16 (64Mbit) Flash memories (D351, D352)

- DOC 16MB (128Mbit) flash memory (D353)

- Serial Flash 32Mbit (D354); - Serial flash is not assembled to kl8 module XIP Memories

The directly executable MPU program code resides in two XIP Flash memories.

In Assembled device when 1.8V IO-line is connected to VPP -pins, Flash devices consider the high level as program enable and actual programming current is taken from Vcc pin of Flash. Vpp connection scheme is shown in Figure 7.

Reset state of MPUGenIO1 protection signal is low so writing/programming is initially disabled.

Flashes are 8Mbyte (4Mx16) 70ns/52MHz synchronous burst mode devices packed in 56 pin CSP (^BGA56).

XIP memories are fully supplied from 1.8V Vcore voltage.

Technical Documentation

3. RF+System Module KL8

Connection in UL8 Flex

Connection in UL8 Flex


Connector 15 16







D351 VPP

D352 VPP

XIP Flashes Figure 7. XIP Flash Vpp connection

XIP Flashes Figure 7. XIP Flash Vpp connection

Synchronous DRAM is used as working memory and PDA display buffer memory. MADLinda has a separate 16 bit wide interface for SDRAM device. Interface supports also byte accesses. Supported memory clocking speeds are 13MHz and 52MHz. MADLinda can execute code also from SDRAM.

The SDRAM is 64Mbits (8Mbyte) 104MHz device in 52-pin CSP (WBGA52). Organisation of the memory is 4Mx16 with byte accesses possibility. Nominal supply voltage Vcc is 2.8V and it is supplied from the common VbB voltage.

SDRAM supports self refresh mode. This mode is used in Deep Sleep mode when all clocks are off to preserve SDRAM data. All memory contents are lost when memory is un-powered, so when the battery is removed or the battery voltage drops under the power off voltage.

DiscOnChip memory is used as Flash file system memory. It is used partly as user memory and partly to hold applications.

The DOC device comprises 128Mbit NAND-type flash memory array and a memory controller inside.

Used DOC memory is a16MByte Mobile DiscOnChip device in 63-ball LFRBGA.

Core voltage for the DOC is supplied from 2.8V VBB and I/O voltage from 1.8V Vcore.

SDRAM Memory

DOC memory

3. RF+System Module KL8

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