Digital Control MADPR

The baseband functions are controlled by the MAD2PR1 asic, which consists of a MCU, a system ASIC and a DSP. The GSM/PCN specific asic is named as MAD2. There are separate controller asics in TDMA and JDC named as MAD1 and MAD3. All the MAD2PR1 asics contain the same core processors and similar building blocks, but differ from each other in system specific functions, pinout and package types.

MAD2PR1 contains following building blocks:

- ARM RISC processor with both 16-bit instruction set (THUMB mode) and 32-bit instruction set (ARM mode)

- TMS320C542 DSP core with peripherials:

- API (Arm Port Interface memory) for MCU-DSP communication, DSP code download, MCU interrupt handling vectors (in DSP RAM) and DSP booting

- Serial port (connection to PCM)

- Timer

- DSP memory

- BUSC (BusController for controlling accesses from ARM to API, System Logic and MCU external memories, both 8- and 16-bit memories)

- System Logic

- CTSI (Clock, Timing, Sleep and Interrupt control)

- MCUIF (Interface to ARM via BusC). Contains MCU BootROM

- DSPIF (Interface to DSP)

- MFI (Interface to COBBA_GJP AD/DA Converters)

- CODER (Block encoding/decoding and A51&A52 ciphering)

- AccIF(Accessory Interface)

- SCU (Synthesizer Control Unit for controlling 2 separate synthesizer)

- UIF (Keyboard interface, serial control interface for COB-BA_GJP PCM Codec, LCD Driver and CCONT)

- UIF+ (roller/ slide handling)

- SIMI (SimCard interface with enhanched features)

- PUP (Parallel IO, USART and PWM control unit for vibra and buzzer)

Technical Documentation

- FLEXPOOL (DAS00308 FlexPool Specification)

- SERRFI (DAS00348 COBBA_GJP Specifications)

The MAD2PR1 operates from a 13 MHz system clock, which is generated from the 13Mhz VCXO frequency. The MAD2PR1 supplies a 6,5MHz or a 13MHz internal clock for the MCU and system logic blocks and a 13MHz clock for the DSP, where it is multiplied to TBD MHz DSP clock. The system clock can be stopped for a system sleep mode by disabling the VCXO supply power from the CCONT regulator output. The CCONT provides a 32kHz sleep clock for internal use and to the MAD2PR1, which is used for the sleep mode timing. The sleep clock is active when there is a battery voltage available i.e. always when the battery is connected.

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