Clocking scheme

In BB5.0, two main clocks are provided to the system: 38.4MHz RF clock produced by VCTCXO in RF section and 32.768kHz sleep clock produced by EM ASIC N2200 with an external crystal.

32 k Sleep Clock is always powered on after startup. Sleep clock is used by RAP for low-power operation.

SMPS Clk is 2.4 MHz clock line from RAP to EM ASIC N2300. In deep sleep mode, when VCTCXO is off, this signal is set to '0'-state.

BT Clk is 38.4 MHz signal from Ahneus ASIC to BT module.

CLK600. The clock source is an internal RC oscillator in EM ASIC N2300 (during the power-up sequence) or RAPIDO SMPS Clk.

RF Clk








Sleep Clk


32.768 kHz

Figure 20 Clocking scheme

In this phone the USB connector is the only physical connector, which means that the USB port is used both for headsets, data transfer as well as for charging. The USB 2.0 is supported with full speed (12 Mbps).

It also supports hot swap, which means that USB devices may be plugged in/out at any time.

This phone is provided with a specific connector for pUSB.

SIM interface

The device has one SIM (Subscriber Identification Module) interface. It is only accessible if battery is removed. The SIM interface consists of an internal interface between RAP and EM ASIC (N2200), and of an external interface between N2200 and SIM contacts.

The SIM IF is shown in the following figure:









Figure 21 SIM interface

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| From battery contact

Figure 21 SIM interface

The EM ASIC handles the detection of the SIM card. The detection method is based in the BSI line. Because of the location of the SIM card, removing the battery causes a quick power down of the SIM interface.

The SIM interface supports both 1.8 V and 3.0 V SIM cards. The SIM interface voltage is first 1.8 V when the SIM card is inserted, and if the card does not response to the ATR a 3 V interface voltage is used.

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