Mhz Arm Nokia 3310 Mad2wd1

MAD2WD1 containsfollowing building blocks:

ARM RISC processor with both 16-bit instruction set (THUMB mode) and 32-bit instruction set (ARM mode)

TI Lead DSP core with peripherals:

• API (Arm Port Interface memory) for MCU-DSP communication, DSP code download, MCU interrupt handling vectors (in DSP RAM) and DSP booting.

• Serial port (connection to PCM)

BUSC (Bus Controller for controlling accesses from ARM to API, System Logic and MCU external memories, both 8- and 16-bit memories)

System Logic

• CTSI (Clock, Timing, Sleep and Interrupt control)

• MCUIF (Interface to ARM via BusC). Contains MCU Boot-ROM

• MFI (Interface to COBBA AD/DA Converters)

• CODER (Block encoding/decoding and A51&A52 ciphering)

• AccIF(Accessory Interface)

• SCU (Synthesizer Control Unit for controlling 2 separate synthesizer)

• UIF (Keyboard interface, serial control interface for COBBA PCM Codec, LCD Driver and CCONT)

• SIMI (SimCard interface with enhanced features)

• PUP (Parallel IO, USART and PWM control unit for vibra and buzzer)

The MAD2WD1 operates from a 13 MHz system clock, which is generated by an internal 'divide by 2' circuit in the HAGAR RF-ASIC. Input to the HAGAR divider is from the 26Mhz VCXO frequency. The MAD2WD1 supplies a 13 MHz internal clock for the MCU and system logic blocks and a 13 MHz clock for the DSP, where it is multiplied to 45.5 MHz DSP clock (13MHz x 7/2).

The system clock is stopped in sleep-mode by disabling the VCXO supply from the CCONT regulator output (VR1). The CCONT provides a 32 kHz sleep clock for internal use and to the MAD2, which is used for the sleep mode timing. The sleep clock is active when there is a battery voltage available i.e. always when the battery is connected. MAD2WD1 supply voltages are VBB for I/O and VCORE for Internal functions as CPU, DSP and System Logic.

Table 14: Mad2WD1 Pin Connections

Ball

Name

Pin Type

Function

A1

MCUGENI00

I0

CCUT (for CHAPS)

B1

SynthClk

0

SynthClk

C2

LEADGND0

PWR

GND

C1

DSPGen0ut2

I0

Not Used

D4

Col2

I0

Pull up

Col2

D3

Col3

I0

Pull up

Col3

D2

Col4

I0

Pull up

Col4

D1

LCDCSX

I0

LCDEN

E4

GND0

PWR

GND

E3

Row5LCDCD

I0

Pull up

LCDCD

E2

Row4

I0

Pull up

Row4

E1

LEADVCC0

PWR

2.5V

F4

Row3

I0

Pull up

Row3

F3

Row2

I0

Pull up

Row2

F2

Row1

I0

Pull up

Row1 (power key)

F1

Row0

I0

Pull up

Not Used

G2

MCUAd21

I0

Pull up

Not Used

G1

VCCSYS0

PWR

2.5V

G3

MCUAd20

I0

Pull down

MCUAd20

G4

MCUAd19

0

MCUAd19

H1

VCCI00

PWR

2.8V

H2

MCUAd18

0

MCUAd18

H3

MCUAd17

0

MCUAd17

H4

LEADGND1

PWR

GND

J1

MCUAd16

0

MCUAd16

J2

MCUAd15

I0

MCUAd15

J3

MCUAd14

I0

MCUAd14

J4

GND1

PWR

GND

K1

MCUAd13

I0

MCUAd13

Ball

Name

Pin Type

Function

K2

MCUAd12

I0

MCUAd12

K3

MCUAdl 1

I0

MCUAd11

Li

ARMGND

PWR

ARMGND

L2

MCUAd9

I0

MCUAd9

L3

MCUAd8

I0

MCUAd8

Mi

MCUAd6

I0

MCUAd6

M2

MCUAd5

I0

MCUAd5

Ni

MCUAd2

I0

MCUAd2

N2

MCUAd1

I0

MCUAd1

M3

MCUAd4

I0

MCUAd4

N3

MCUAd0

I0

SRAM UB (Upper; 16 bit data)

K4

ARMVCC

PWR

2.5V

L4

MCUAd7

I0

MCUAd7

M4

MCUAd3

I0

MCUAd3

N4

VCCSYS1

PWR

2.5V

K5

MCUAd10

0

MCUAd10

L5

GND2

PWR

GND

M5

MCURdX

0

MCURdX

N5

MCUWrX

0

MCUWrX

K6

ExtMCUDa0

I0

Pull down

MCUDa0

L6

ExtMCUDa1

I0

Pull down

MCUDa1

M6

ExtMCUDa2

I0

Pull down

MCUDa2

N6

ExtMCUDa3

I0

Pull down

MCUDa3

M7

ExtMCUDa5

I0

Pull down

MCUDa5

N7

ExtMCUDa6

I0

Pull down

MCUDa6

L7

ExtMCUDa4

I0

Pull down

MCUDa4

K7

VCCI01

PWR

2.8V

N8

ExtMCUDa7

I0

Pull down

MCUDa7

M8

MCUGenI0Da0

I0

Pull down

MCUDa8

L8

MCUGenI0Da1

I0

Pull down

MCUDa9

Ball

Name

Pin Type

Function

K8

MCUGenI0Da2

I0

Pull down

MCUDa10

N9

MCUGenI0Da3

I0

Pull down

MCUDa11

M9

MCUGenI0Da4

I0

Pull down

MCUDa12

L9

MCUGenI0Da5

I0

Pull down

MCUDa13

K9

GND3

PWR

GND

N10

MCUGenI0Da6

I0

Pull down

MCUDa14

M10

VCCSYS2

PWR

2.5V

L10

MCUGenI0Da7

I0

Pull down

MCUDa15

N11

R0M1SelX

0

R0M1SelX(F_CE)

M11

RAMSelX

0

RAMSelX (S_CS)

L11

JTD0

I0

Pull up

JTD0

N12

JTRst

I0

Pull down

JTRst

M12

JTClk

I0

Pull up

JTCyk

N13

JTDI

I0

Pull up

JTDI

M13

JTMS

I0

Pull up

JTMS

L12

CoEmu0

I0

Pull up

CoEmu0

L13

CoEmu1

I0

Pull up

CoEmu1

K10

SCVCC

PWR

2.8V

K11

RFClk

X1

RFC

K12

RFClkGND

PWR

GND

K13

SIMCardDetX

X2

CARDDET

J10

SCGND

PWR

GND

J11

R0M2SelX

I0

Pull up

Not Used (MEMC(6))

J12

GND4

PWR

GND

J13

EEPR0MSelX

I0

Pull up

BUTT0N_CTRL

H10

LEADVCC1

PWR

2.5V

H11

MCUGenI01

I0

Pull up

PA_Vendor1 (detect)

H12

Testmode

I

Pull down

Testmode

H13

ExtSysResetX

0

Flash_WP/_RP

Ball

Name

Pin Type

Function

G12

VibraPWM

I0

Pull down

Vibra

G13

VCCI02

PWR

2.8V

G11

VCCSYS3

PWR

2.5V

G10

MCUGenI04

I0

Pull up

CHARLIM

F13

LEADGND2

PWR

GND

F12

LoByteSelX

I0

Pull up

SRAM LB (Lower; 16 bit data)

F11

HookDet

I0

HookDet

F10

HeadDet

I0

HeadDet

E13

MCUGenI02

I0

Pull up

PA_Vendor2 (detect)

E12

MCUGenI03

I0

Pull up

Not Used

E11

VCXOPwr

0

VCXOPwr / SleepX

E10

GND5

PWR

GND

D13

Synth Pwr

I0

Pull down

Not Used

D12

SIMCardPwr

IO

Pull up

SIMCardPwr

D11

LEADVCC2

PWR

2.5V

C13

RxPwr

I0

Pull down

Flash Vpp ctr. (protect)

C12

TxPwr

I0

Pull down

KBLIGHTS

C11

SIMCardData

I0

SIMCardData

B13

PURX

I

PURX

B12

CCONTInt

I

CCONTInt

A13

Clk32k

I

SleepClk

A12

SIMCardClk

0

SIMCardClk

B11

SIMCardRstX

0

SIMCardRstX

A11

SIMCardI0C

0

SIMCardIOC

D10

VCCI03

PWR

2.8V

C10

GenCCONTCSX

0

CCONTCSX

B10

GenSDI0

I0

GenSDIO

A10

GenSClk

0

GenSClk

D9

BuzzPWM

I0

Pull down

Buzzer

Ball

Name

Pin Type

Function

C9

GND6

PWR

GND

B9

PCMTxData

I0

Pull down

PCMTxData

A9

PCMRxData

I0

Pull up

PCMRxData

D8

DSPXF

I0

Pull up

Not Used / DSPXF

C8

PCMI0

I0

Pull up

Not used

B8

PCMDClk

I0

Pull down

PCMDCIk

A8

PCMSClk

I0

Pull down

PCMSCIk

B7

VCCSYS4

PWR

2.5V

A7

C0BBASD

I0

SERRFI Serial Data

C7

Idata

I0

Pull up

SERRFI Idata

D7

Qdata

I0

Pull up

SERRFI Qdata

A6

C0BBACSX

0

SERRFI CSX

B6

VCCI04

PWR

2.8V

C6

C0BBAClk

0

CobbaCIk

D6

AccRxData

I

FBUS Rx

A5

DSPGen0ut5

0

HAGAR_RESET_X

B5

MBUS

I0

MBUS

C5

AccTxData

I0

FBUS Tx

D5

GND7

PWR

GND

A4

DSPGen0ut4

I0

COBBA_RESET_X

B4

SynthEna2X

I0

Pull down

CHAR_CTRL

C4

Col1

I0

Pull up

Coli

A3

FrACtrl

I0

Pull down

LCDRSTX

B3

SynthEna

0

SynthEna

C3

Col0

I0

Pull up

ColO

A2

TxPA

I0

Pull down

TXP/TXPwr (CCONT)

B2

SynthData

0

SynthData

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