The SIM interface is the serial interface between the smart card and the baseband. The SIM interface logic levels are 5V since no 3V technology SIM is yet available. The baseband is designed in such a way that a 3V technology SIM can be used whenever it is available. The SIM interface signals are generated inside the ASIC. The signals coming from the ASIC are converted to 5V levels. The PSCLD circuit is used as the logic voltage conversion circuit for the SIM interface. The PSCLD circuit also contains the voltage regulator for the SIM power supply. The control signals from the ASIC to PSCLD are at 3V level and the signals between PSCLD and the SIM are 5V levels. An additional control line between the ASIC and the PSCLD is used to control the direction of the DATA buffer between the SIM and the PSCLD. In a 3V technology environment this signal is internal to the ASIC only. The pull up resistor required on the SIM DATA line is integrated into the PSCLD and the pull-up is connected to the SIM regulator output inside PSCLD. In idle the DATA line is kept as input by both the SIM and the interface on the base band. The pull-up resistor is keeping the DATA line in it's high state.
The power up and power down sequences of the SIM interface is performed according to ISO 7816-3. To protect the card from damage when the power supply is removed during power on there is a control signal, CARDIN, that automatically starts the power down sequence. The CARDIN information is taken from the battery size indicator signal, BSI, from the battery connector. The battery connector is designed in such a way that the BSI signal contact is disconnected first, while the power is still supplied by the battery, and the battery power contacts are disconnected after that the battery pack has moved a specified distance.
Since the power supply to the SIM is derived from PSCLD also using 3V technology SIM the power supply voltage of the SIM regulator is programmable 3.15/4.8 V. The voltage is selected by using the serial control bus to PSCLD. The default value is set to 3.2V nominal.
For cross compatibility reasons the interface should always be started up using 5V. The 3V technology SIM will operate at 5V but a 5V SIM will not operate at 3V. The supply voltage is switched to 3V if the SIM can accept that. The SIM has a bit set in a data field indicating it's capability of 3V operation.
The regulator control signal is derived from the ASIC and this signal controls the operation of the SIM power supply regulator inside PSCLD. To ensure that the powered off ASIC doesn't cause any uncontrolled operations at the SIM interface the PSCLD signals to the SIM are forced low when the PURX signal is active, low. This implementation will ensure that the SIM interface can not be activated by any external signal when PSCLD has PURX active. When PURX goes inactive the control of the interface signals are given back to the ASIC signals controlling PSCLD SIM interface operations.
The clock to the SIM can be switched off if the SIM card allows stopping of the clock. The clock can be stopped either in high or low state, determined by the card data. For cards not allowing the clock to be stopped there is a 1.083 MHz clock frequency that can be used to reduce the power consumption while the clock is running. In this case the VCO must be running all the time. When the clock is stopped and the status of the CARDIN signal changes, battery is removed, the clock to the SIM is restarted inside the ASIC and the SIM power down sequence is performed.
To be able to handle current spikes as specified in the SIM interface specifications the SIM regulator output from PSCLD must have a ceramic capacitor of 100 nF connected between the output and ground close to the SIM interface connector. To be able to cope with the fall time requirements and the disconnected contact measurements in type approval the regulator output must be actively pulled down when the regulator is switched off. This active pull-down must work as long as the external battery is connected and the battery voltage is above the PSCLD reset level.
The SIM power on procedure is controlled by the MCU. The MCU can power up the SIM only if the CARDIN signal is in the inactive state, low. Once the power up procedure has been started the ASIC takes care of that the power up procedure is performed according to ISO 7816-3.
The SIM interface uses two clock frequencies 3.25 MHz or 1.625 MHz during SIM communication. The data transfer speed in the SIM GSM session is specified to be the supplied clock frequency/372. The ASIC SIM interface supplies all the required clock frequencies as well as the required clock frequency for the UART used in the SIM interface data transmission/reception.
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