Audio Control

The audio codec N200 is controlled by the MCU, D150. Digital audio is transferred on the CODECB(5:0). PCM data is clock at 512 kHz from the ASIC and the ASIC also generates 8 kHz synchronization signal for the bus. Data is put out on the bus at the rising edge of the clock and read in at the falling edge. Data from the DSP, D152 to the audio codec, N200 is transmitted as a separate signal from data transmitted from the audio codec, N200 to the DSP, D152. The communication is full duplex synchronous. The transmission is started at the falling edge of the synchronization pulse. 16 bits of data is transmitted after each synchronization pulse.

System Module Technical Documentation

System Module Technical Documentation

The 512 kHz clock is generated form 13 MHz using a PLL type of approach which means that the output frequency is not 512 kHz at any moment. The frequency varies as the PLL adjusts the frequency. The average frequency is 512 kHz. The clock is not supplied to the codec when it is not needed. The clock is controlled by both MCU and DSP. DTMF tones are generated by the audio codec and for that purposes the 512 kHz clock is needed. The MCU must switch on the clock before the DTMF generation control data is transmitted on the serial control bus.

The serial control bus uses clock, data and chip select to address the device on the bus. This interface is built in to the ASIC and the MCU writes the destination and data to the ASIC registers. The serial communication is then initiated by the ASIC. Data can be read form the audio codec, N200 via this bus.

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